1. Field of the Invention
This invention relates generally to a method of fabricating monolithic multifunction integrated circuits and the resulting integrated circuit and, more particularly, to a method of selective molecular beam epitaxy for fabricating different semiconductor device types in an integrated circuit format on a common substrate and the resulting integrated circuit.
2. Discussion of the Related Art
It is known that the integration of multifunction circuit devices, i.e., circuits that include more than one device type, on a common substrate, in certain applications, such as microwave, millimeter wave, and optoelectronic applications, increases the performance of the integrated circuits incorporating the integrated devices over circuits that separately integrate the different device types. For example, by monolithically integrating a high electron mobility transistor (HEMT) and a heterojunction bipolar transistor (HBT), both well known devices in the art, the combination of the low-noise advantages of the HEMT and the high power, high linearity advantages of the HBT can provide microwave circuits with lower noise and higher power than could be realized by separately fabricating the HEMT and HBT in known baseline fabrication techniques and combining the devices in hybrid circuits.
Many other circuits could benefit from the integration of multifunction circuit devices. PIN diode limiters are currently used to shield low-noise HEMTs in high-energy environments because HEMTs have a tendency to burn out from the high energy. However, because PIN diode limiters and HEMTs are currently separately integrated in hybrid circuits, there are additional transition losses that if the PIN diode limiter and the HEMT were monolithically integrated on the same substrate, such losses would be essentially eliminated. Additionally, digital function advantages of HBTs can be combined with microwave function advantages of HEMTs, so that for many applications, such as transistor-transistor logic (TTL) controlled phase shifters, HBTs and HEMTs can be generated with increased performance. In another example, HEMT amplifiers can be stabilized using HBT active regulation for improved reliability and stability. Essentially, any circuit application requiring multiple high performance semiconductor devices can be more effectively realized using monolithic integration rather than hybrid integration.
Current semiconductor fabrication techniques are limited in the ability to fabricate more than one device type on a common substrate. Different techniques for integrating semiconductor devices having different functions are known in the art. For example, the integration of PIN diodes and metal semiconductor field effect transistors (MESFETS) or HEMTs has been accomplished using a single molecular beam epitaxial growth layer with certain interconnect schemes. See for example S.
Miura et al., xe2x80x9cA Monolithically Integrated AlGaAs/GaAs p-i-n/FET photoreceiver by MOCVD,xe2x80x9d IEEE Electron Dev. Lett., Vol. 4, pp. 375-376, 1983. Additionally, PIN diodes and MESFETs or HEMTs have been integrated using a molecular beam epitaxy (MBE) regrowth process. See Y. Zebda et al., xe2x80x9cMonolithically Integrated InP-Based Front-End Photoreceivers,xe2x80x9d IEEE Trans. Elect. Dev., Vol. 38, pp. 1324-1333, 1991. Further, the integration of lasers and HBTs has been accomplished using buried epitaxial layers and MBE regrowth. See J. Shivata et al., xe2x80x9cMonolithic Integration of InGaAsP/InGaAsP/InP Laser Diode With Heterojunction Bipolar Transistors,xe2x80x9d Appl. Phys. Lett., Vol. 45, pp. 191-193, 1984 and P. R. Berger et al., xe2x80x9cGaAs Quantum Well Laser and Heterojunction Bipolar Transistor Integration Using Molecular Beam Epitaxial Regrowth,xe2x80x9d Appl. Phys. Lett., Vol. 59, pp. 2826-2828, 1991. GaAs-based Bi-FET technology has been reported using a single epitaxial growth with the FET merged into the HBT collector or emitter, or using AlGaAs overgrowth combined with beryllium implantation. See K. Itakura et al., xe2x80x9cA GaAs Bi-FET Technology For Large Scale Integration,xe2x80x9d IEDM Technical Digest, pp. 389-392, 1989; D. Cheskis et al., xe2x80x9cCointegration of GaAlAs/GaAs HBTs and GaAs FETs With A Simple Manufacturable Processes,xe2x80x9d IEDM Technical Digest, pp. 91-94, 1992 and J. Y. Yang et al., xe2x80x9cGaAs BIJFET Technology For Linear Circuits,xe2x80x9d Proceeding IEEE GaAs IC Symposium, pp. 341-344, 1989. In each of these examples, the FET performance is compromised due to the limitations of the profile and the process. InP based HEMT-HBT integration has also been attempted using a single epitaxial growth, but successful operation of both device types has not yet been reported. See W.E. Stanchina et al., xe2x80x9cInP-Based Technology for Monolithic Multiple-Device, Multiple-Function ICs,xe2x80x9d GOMAC Digest of Papers, pp. 385-388, 1991.
U.S. Pat. No. 5,262,335 issued to Streit et al., assigned to the assignee of the instant application, and herein incorporated by reference, discloses a method to produce complimentary heterojunction bipolar transistors in which a first NPN or PNP profile is grown by selective molecular beam epitaxy on a substrate. A silicon nitride layer is then deposited over the profile, and the silicon nitride layer and the profile are selectively patterned and etched to define an NPN or PNP heterojunction bipolar transistor. The opposite NPN or PNP profile is then deposited on the substrate adjacent to the original profile such that the remaining portion of the silicon nitride layer protects the original profile from the growth of the second profile. The devices are patterned and etched such that the silicon nitride layers are removed and adjacent complimentary NPN/PNP profiles remain on the substrate.
Fabrication processes in the prior art are limited in their ability to produce monolithic integrated devices. It is an object of the present invention to provide a selective molecular beam epitaxy fabrication method that enables a significant number of integrated devices to be monolithically integrated on a common substrate.
In accordance with the teachings of the present invention, a method is disclosed for fabricating monolithic multifunction integrated circuit devices. In one method of the invention, an HBT or PIN diode device is monolithically integrated on a common substrate with an HEMT or MESFET device. The process involves first growing by selective molecular beam epitaxy an HBT or PIN diode profile layer on a GaAs or InP substrate. A first silicon nitride layer, or other appropriate dielectric layer, is then deposited over the HBT or PIN diode profile layer. The first silicon nitride layer and the HBT or PIN diode profile layer are patterned and etched such that an HBT or PIN diode device layer covered by a silicon nitride layer remains adjacent to an area where the substrate is exposed. An HEMT or MESFET profile layer is then grown over the substrate such that single crystalline HEMT or MESFET material is deposited on the substrate and polycrystalline HEMT or MESFET material is deposited on the remaining silicon nitride layer. The polycrystalline HEMT or MESFET material and the remaining silicon nitride layer are etched away so that an HBT device profile or PIN diode device profile and an MESFET device profile or an HEMT device profile remain on a common substrate.
This process can also be extended to more than two functional devices on a common substrate. For example, to generate a PIN diode-HBT-HEMT monolithically integrated device, a substrate is provided on which is deposited a PIN diode profile layer. A first silicon nitride layer is deposited over the PIN diode profile layer, and the silicon nitride layer and the PIN profile layer are patterned and etched to define a PIN diode device profile covered with a silicon nitride layer. An HBT profile layer is then grown on the substrate such that single crystalline HBT material is deposited on the exposed substrate and polycrystalline HBT material is deposited on the remaining portion of the first silicon nitride layer. The polycrystalline HBT material and the remaining first silicon nitride layer are etched away, and a second silicon nitride layer is deposited. The second silicon nitride layer and the HBT single crystalline material are then patterned and etched to define an HBT device profile on the substrate. An HEMT profile layer is then grown on the substrate such that single crystalline HEMT material is deposited on the substrate and polycrystalline HEMT material is deposited on the remaining portion of the second silicon nitride layer. The polycrystalline HEMT material and the remaining second silicon nitride layer are then etched away such that an integrated PIN diode-HBT-HEMT device remains.
Once all of the device profiles are grown on the common substrate, subsequent device and circuit processing is performed to further define and interconnect the devices.
Additional objects, advantages, and features of the present invention will become apparent from the following description and appended claims, taken in conjunction with the accompanying drawings.